CIC-310

Kit contents

1. FPGA (8000/10K) programming board (84pin)

2. I/O device board (O/I)

3. ^MAX+PLUS® II design software (educational version
educational)

4. management program for software loading and
programming in the circuit (In-System_programming)

5. exercise manual

Characteristics of the software board

1 The FPGA chip has more than 2500/10000 logic gates. Internal SRAM memory cells allow the chip to reach operating speeds of up to several hundred MHz.

2. ISP architecture saves you from buying additional special programmers. The user can load a program into both SEEPROM memory and the FPGA chip via RS-232 interface.

3 The user can load several programs onto the board using the program manager and the SEEPROM located on the board. Once the programs are loaded, all the user needs is a suitable spooler to select a particular program.

4. data compression function allows the user to keep more programs in SEEPROM memory.

5. 64kb SEEPROM memory is expandable up to 256kb.

6. all I/O component terminals are assigned to specific pins of the FPGA chip. The user only needs to pay attention to the pin layout of the FPGA chip in ^MAX+PLUS®IIsoftware.

7 On request, another FPGA chip (Altera EPF-8000/10K) can be used in the board.

Characteristics of the exercise module

1. signal generator: 2 sets of pulse waveform generators with continuously adjustable frequency in the range of 0.1Hz ~ 500kHz.

2. Pulse generator: 4 sets of pulse waveform generators with anti-interference circuits.

3. input switches: 3 assemblies of 8-bit DIP logic switches. 2 assemblies monitored by 16 LEDs.

4. LED output indicator: 32 LEDs with digital output buffer.

5. Keypad: 4x4 matrix can be set up as 16 independent pushbutton switches or 3x4 matrix keypad and 4 independent pushbuttons.

6. Quartz oscillator: two independent quartz oscillators (20MHz, 11.059MHz). The 20MHz resonator circuit is equipped with a socket to replace the resonator.

7. 7-segment LED display: 6 digits; serial or parallel scanning.

8. alphanumeric display composed of 17-segment LED indicators.

9. dot display: 5x7 dot matrix.

List of exercises

1 Design of combinational logic circuits.

2. design of sequential logic circuits.

3. design of flip-flop circuits.

4. Design of counters and their applications.

5. design of arithmetic logic units (ALUs).
and their applications.

6. design of encoders and decoders and circuits.
multiplying and dividing circuits.

7. design of frequency synthesizers and shift registers.
shifters.

8. Manufacturing and applications of digital circuits.